Conference Service Mandl

abstract: This workshop will give an in-depth presentation of digital CMOS circuits and associated design techniques for digital VLSI systems. We will begin with a review of static CMOS circuits, including static CMOS circuit topologies, RC timing models and the logical effort of static logic gates. The sources of power dissipation and its minimization will be discussed, including transistor sizing and network topology issues. The systematic design of pass transistor networks will be given, including map-based and table-based methods of design. A wide range of dynamic CMOS circuit topologies will be presented, including domino CMOS, multiple-output domino, skew-tolerant domino, DCVS and dynamic CPL. The design of storage elements will be presented, including dynamic and static latches, as well as methods for merging latches with combinational logic.